The present invention relates to a semiconductor device manufacturing method of forming a wiring layer.
In forming a multilayered structure on a substrate, each wiring layer must be made flat. The technique of forming a flat wiring layer includes the method described in "The chemical vapor deposition of aluminum for interconnect and via applications: an integration overview", Proceedings Metallization and Interconnect Systems for ULSI Application in 1996 (reference 1).
The wiring layer forming method described in reference 1 will be explained with reference to FIGS. 3A to 3F. As shown in FIG. 3A, a lower aluminum wiring layer 303 is formed on a semiconductor substrate 301 via an insulating film 302, and then an interlevel insulating film 304 is formed on the insulating film 302 to cover the lower wiring layer 303.
As shown in FIG. 3B, a contact hole 305 for electrically connecting the lower wiring layer 303 is formed at a predetermined position in the interlevel insulating film 304. A wiring groove 306 passing the contact hole 305 is formed in the interlevel insulating film 304.
A native oxide film formed on the surface of the lower wiring layer 303 exposed at the bottom of the contact hole 305 is removed. In this removal, the bottom of the contact hole 305 is exposed to a chlorine-based gas plasma. The plasma is generated by supplying Cl.sub.2 gas at a flow rate of 10 sccm and Ar gas at a flow rate of 50 sccm to a chamber evacuated to a pressure of about 3 mTorr, and applying the 13.56-MHz RF to the chamber at an output of 20 W.
As shown in FIG. 3C, an aluminum layer 307 is selectively deposited on the lower wiring layer 303 exposed at the bottom of the contact hole 305. The aluminum layer 307 is formed by chemical vapor deposition (CVD) using dimethylaluminum hydride ((CH.sub.3).sub.2 AlH) as a precursor. At this time, aluminum islands 307a are also formed on the interlevel insulating film 304.
As shown in FIG. 3D, a titanium nucleation layer 308 is formed thin on the interlevel insulating film 304 and the aluminum layer 307 by sputtering. Aluminum is deposited by batch CVD using the nucleation layer 308 as a nucleus to form an aluminum film 309 to be connected to the lower wiring layer 303 via the contact hole 305, as shown in FIG. 3E.
The upper portion of the aluminum film 309 is removed by chemical-mechanical polishing so as to expose the surface of the interlevel insulating film 304, thereby forming a wiring layer 310 connected to the lower wiring layer 303 via the contact hole 305, as shown in FIG. 3F.
However, forming the wiring layer 310 by the above method undesirably forms a gap 311 between the wiring layer 310 and the interlevel insulating film 304, as shown in FIG. 3F. This is because the aluminum islands 307a are also formed on the side wall of the interlevel insulating film 304 upon selectively depositing aluminum by CVD, as shown in FIG. 3C.
If the island 307a is formed on the side wall of the interlevel insulating film 304, a gap (broken portion) 308a where no nucleation layer 308 is formed is formed upon forming the nucleation layer 308, as shown in FIG. 3D. In the presence of the gap 308a, a void 312 is formed upon forming the aluminum film 309 by CVD, as shown in FIG. 3E. As a result, the gap 311 is formed at the boundary of the wiring layer 310 and the interlevel insulating film 304, as shown in FIG. 3F.
In the presence of the gap 311, the cross-sectional wiring area decreases in the wiring layer 310 near the gap 311, and thus the current density increases. At the portion whose cross-sectional wiring area is small, the temperature rises higher than in the remaining region upon application of a voltage, and electromigration easily occurs. If it occurs, the wiring layer 310 is disconnected to greatly degrade the reliability of the semiconductor device.